Murugavel Ganesan

Past

Sr. Member Design Team at Alliance Semiconductor Corporation
Lead Engineer at Ipsil Incorporated
ASIC Design Engineer at Xinet Ltd

ASIC Design Engineer at ArrayComm Inc.
Teaching/Research Assistant at Texas A&M university

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Education

Texas A&M University
Bapuji Institute of Engineering and Technology
Gautami Jr. College, Sanjeeva Reddy Nagar, Hyderabad

St. Marks High School, W.Marredpally, Secunderabad

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Recommended

7 people have recommended Murugavel

Connections

110 connections

Industry

Semiconductors

Websites

Murugavel Ganesan’s Summary

I have been told many times what "is not possible", but I have always loved challenges, and rarely give up. My skills are varied, my interests many...
I consider myself a self-starter, a passionate and a very creative person, who likes to work fast and try to help others.

Chip Design platform strengths:
FPGAs, ASICs & SoC based product development.

Technology Strengths:
System Architecture, IP Development, Rapid Prototyping, Platform Emulation, Mobile Platform Development, 10/100/1000 Ethernet and Multi-Gigabit Ethernet based Product Development, Optical networking technologies like PON and GPON, TCP Offload Engines, PCI, PCI-Express, Advanced Switching based Switch Development.

Skills:
IP Development, Hardware System Integration, Functional Verification, knowledge of HDLs like Verilog & VHDL, extensive experience in FPGA Synthesis & Timing Closure, Wireless Network Infrastructure Design, Wired Network Infrastructure Design.

Competencies:
Up to date with current trends in Technology and market requirements and Digital Convergence.

Bottom line:
A must have for any Technology Company.

Murugavel Ganesan’s Experience

Sr. Member Design Team

Alliance Semiconductor Corporation

(Public Company; 201-500 employees; ALSC; Semiconductors industry)

April 2005 — February 2006 (11 months)

Architecture & Design of Advanced Switching (ASI) and PCI-E based switches.
Lead Engineer

Ipsil Incorporated

(Privately Held; 1-10 employees; Semiconductors industry)

April 2003 — March 2005 (2 years )

Architecture and Design of accelerated TCP Offload Engines on high density Xilinx FPGAs and leveraging support on ASICs via a delayered parallel architecture, achieving line speed packet processing at 10/100, Gigabit and Multi Gigabit rates.

Development of a micro form factor De-Layered Grid Storage Server based on the above Technology capable of TCP offloads at speeds greater than 10Gbps with a SPI backbone.
ASIC Design Engineer

Xinet Ltd

(Privately Held; 11-50 employees; Information Technology and Services industry)

February 2002 — March 2003 (1 year 2 months)

Design and Implementation of High speed RSA encryption Engine on ASIC.
ASIC Design Engineer

ArrayComm Inc.

(Privately Held; 51-200 employees; Semiconductors industry)

August 2000 — February 2002 (1 year 7 months)

Development of Encoder/Decoder models for subscriber side Baseband modem, i-Burst User Terminal (UT) in Matlab which was later ported to Verilog RTL. Completed unit level validation for a subset of UT’s functional blocks using Matlab & Verilog. Completed performance analysis and unit level validation of Fixed-point & Floating point Matlab & Verilog models of i-Burst UT encoder and decoder blocks. Completed Implementation, synthesis, timing closure and FPGA based validation for ArrayComm’s i-burst, subscriber side baseband modem plus slim line UT SOC implementation in a PCMCIA formfactor.
Teaching/Research Assistant

Texas A&M university

(Educational Institution; 5001-10,000 employees; Semiconductors industry)

August 1999 — July 2000 (1 year )

Teaching/Research Assistant at the Digital Systems Lab, Texas A&M University.

Murugavel Ganesan’s Education

Texas A&M University

Master of Science , Electrical Engineering , 1999 — 2001

Thesis: On Viterbi Decoders for Wireless CDMA
Designed an optimally fast, efficient and a low latency Viterbi decoder using a novell register exchange scheme instead of the traditional trace back scheme.

Activities and Societies:

I was the secretary of the Indian Students Association and Technical member of the IEEE students chapter.
Bapuji Institute of Engineering and Technology

Bachelor of Engineering , Electronics & Communication , 1994 — 1998

Graduated with Honors. Majored in Design of Advanced Digital Systems & VLSI Systems Design.
Graduate Research Project Titled “Content Based Image Retrieval”, 1998.
Gautami Jr. College, Sanjeeva Reddy Nagar, Hyderabad

+2 , Mathematics, Physics, Chemistry , 1992 — 1994

Major subjects were Mathematics, Physics and Chemistry.
St. Marks High School, W.Marredpally, Secunderabad

1985 — 1992

Recognized for all round competence and won many awards of merit in science.

Activities and Societies:

First elected Student Secretary of the school.