Sr ASIC Verification Engineer
India
Sr ASIC Verification Engineer
India
• Currently working on Ethernet uVC development using 'e' and System Verilog. Technically leading 8 people team.
• As a Senior Verification Enginner I have successfully executed several Onsite engagements with different multi-national companies.
• Worked on SoC verification using SystemC/C++ and System Verilog
• ASIC Design Cycle, Methodology and testing.
• Verification using C, C++ and SystemC, e-Language for Specman and Verilog.
• Verification of AHB Master Transactor DUT, AMBA-APB in Verilog.
• Design and implementation of SONET/SDH Verification Component in e.
• Verification of PCI-Express DUT (DLL/MAC-X8/X16) using PCI-Express e Verification component.
• Design and implementation of IEEE 802.15.3 (UWB) MAC Verification Component.
• Working Knowledge on scripting languages like PERL, Bash
System Verilog, Specman, SystemC/C++, Verilog, Perl, SoC Verification, eRM, OVM, VMM, Verification Environment Development