R & D Design Engineer
India
- Current
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- R & D Design Engineer at Nokia
- Connections
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191
connections
- Industry
- Semiconductors
Pradeep Vemuri’s Summary
Career Summary
SoC Verification
C Based verification environment
Reference Verification Methodology based self checking Test Bench design
Synthesizable Test Bench desig
Behavioral Models, Bus Functional Models using Verilog HDL
Data comparisons, Configuring Test Bench using PERL scripting
Assertion Based Verification using System Verilog
Reusable IP Design
Modular Design of the IP Block, with separated Bus Interfaces and Core Functionality to support Design Reuse
State Machine Design
Handling Clock Domain Crossing
Synthesizable RTL coding using Verilog HDL
Fundamentals in ASIC, FPGA Synthesis
Synthesized simple modules for ASIC, FPGA
Domain Knowledge
Universal Serial Bus Specification – Revision 2.0 with ULPI & UTMIW interfaces
EGG Ware GPRS/GPS LC5G Hardware IP Module Specification – Version 1.0
Good knowledge at MIPI HSI & MIPI CSI protocols
AMBA Specification – Revision 2.0
Advanced High-performance Bus(AHB)
Advanced Peripheral Bus(APB)
Basic knowledge in WLAN 802.11 protocol, especially the MAC interface
Worked extensively on ARM cross compiler
Good at defining & developing assertions
ARM946E-S processor architecture
Pradeep Vemuri’s Specialties:
Strong in designing Synchronizers for clock domain crossing signals
Capable of designing Asynchronous State Machines
Pradeep Vemuri’s Experience
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R & D Design Engineer
Nokia
(Public Company; 10,001 or more employees; NOK; Telecommunications industry)
September 2008 — Present (1 year 4 months)
Additional Information
Pradeep Vemuri’s Groups:
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Semiconductor Professional's Group -
SemiconductorJobs.com -
Nokia Alumni (past and present) -
VLSI Design -
Nokia Alumni -
ASIC & FPGA Engineers: www.ASICForum.com -
The Indus Entrepreneurs (TiE), Bangalore -
JNTU College of Engineering, Hyderabad, India -
VEDA IIT Hyderabad -
Semiconductor - VLSI -
ASIC Integration, Verification & Validation -
Indian Semiconductor Society -
Indian Semiconductor Association -
Expert's in SystemVerilog/Specman/VERA/System C -
Wireless ASIC VLSI Design -
ASIC / VLSI Experts -
ASIC / COT Chip Implementation (Timing Constraints, Analysis & Closure)
